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Auteur
Sutherland, Stuart (1) Ritchie, Stuart (2) Comer, Stuart, Jhaveri, Shanay, Lebovici, Élisabeth, Ault, Julie (1) Dufranne, Michel, Vicanovic, Milorad (1) Berner, Rotraut Susanne (1)
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2017 (1)
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Resultaat

Sutherland, Stuart - RTL Modeling with SystemVerilog for Simulation and Synthesis: Using SystemVerilog for ASIC and FPGA Design
Paperback
Sutherland, Stuart
RTL Modeling with SystemVerilog for Simulation and Synthesis: Using SystemVerilog for ASIC and FPGA Design
€ 123.70
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