In this work nanoscale properties in active layers of small molecule organic solar cells are studied regarding their impact on device performance. For this, the effect of variations in stack design and process conditions is examined both electrically and with high resolution imaging techniques. Two topics are addressed: (i) the visualization of charge extraction/injection properties of solar cell contacts and (ii) the tailoring of structural properties of co-evaporated material blends for bulk heterojunction (BHJ) organic solar cells. (i) We study the impact of controlled contact manipulation on the internal electric potential distribution of fluorinated zincphtalocyanine (F4ZnPc)/fullerene (C60) organic solar cells under operating conditions. In a detailed analytical study using photoelectron spectroscopy and in-operando scanning Kelvin probe microscopy it is demonstrated that the electric field distribution of organic solar cells at the maximum power point depends in an overproportional manner on contact properties and ranges from bulk to contact dominated even for solar cells with decent device performance. (ii) The morphology of co-evaporated active layer blends depends on both substrate and substrate temperature. Here we study the morphology of F4ZnPc:C60 blends with analytical transmission electron microscopy. For all substrates used is found that co-evaporation of the materials at elevated substrate temperature (100° Cel) induces a distinct phase segregation of F4ZnPc and C60. However, only when using a C60 underlayer, as in inverted devices, also the crystallinity of the segregated C60 phase increases. There is only a slight increase in crystallinity when F4ZnPc acts as an underlayer, as typically for non-inverted devices. Solar cell characterization reveals that the crystalline C60 domains are the main driving force for enhanced free charge carrier generation and higher power conversion efficiencies. With this we could provide a novel explanation why record efficiencies of small molecule organic solar cells are realized in inverted device architecture only.